AP Memory Technology has disclosed plans to raise its specialty DRAM (SRAM) prices. The memory design house also expressed optimism about demand for IoT applications that will offset a slowdown in demand coming from the handset market.
The supply of NAND flash has been tight affecting the market for SDRAM particularly low-power DRAM chips, AP Memory indicated. NAND flash with low-power DRAM is the mainstream memory solution for smartphones.
AP Memory noted its foundry partner Powerchip Technology has raised its manufacturing quotes. The memory design house has therefore decided to revise its price to reflect the rising costs.
AP Memory added it is working with Powerchip to transition to the next-generation 25nm process technology.
In addition, AP Memory expects new and emerging IoT applications will be the next driver of SRAM demand growth. Pseudo SRAM demand has been rising driven by China's growing bike-sharing market, for example. PSRAM chips are used for shared bikes equipped with GPS function.
Unlike PCs and handsets, IoT is an architecture that generates a number of devices and systems that interconnect, AP Memory said. IoT is now AP Memory's new business focus, said the company, adding that SRAM demand will be driven by diverse applications in the IoT era.
In addition, AP Memory expects its acquisition of fellow company Zentel Electronics to create a synergy. Earlier in 2017, AP Memory disclosed plans to buy the remaining 44.76% stake in Zentel it does not hold for a total of NT$441 million (US$14.38 million). The acquisition, set for completion on October 1, will help accelerate AP Memory's reach to the IoT market, the company said.
AP Memory is also partnering with Macronix International to develop jointly NAND MCP memory solution, which has been adopted by Qualcomm as a part of the reference design for a LTE Cat. M1/NB-1 chipset, the MDM9206 modem.
Meanwhile, AP Memory is among the initial members of the Xccela consortium, which also include Micron Technology, Winbond Electronics and GigaDevice Semiconductor. The companies will work together to accelerate the industry efforts to bring a broad set of Xccela Bus compliant memories, controllers, ASIC, SoC, and other devices to the market. The Xccela Bus is the next generation of system buses that combines accelerated performance with a small signal count. |