Micron Technology and Samsung Electronics announced on October 6 the creation of an industry consortium for OEMs, enablers and integrators that will collaborate in developing and implementing an open interface specification for hybrid memory cube (HMC).
HMC is an innovation in DRAM memory architecture that breaks through the memory wall, setting a new standard for performance, power efficiency, reliability and cost, according to the companies. The consortium will bring together OEMs, enablers and integrators committed to delivering the promise of HMC to a range of applications including networking, storage and high-performance computing.
As the founding members of the consortium, Micron and Samsung will work closely with fellow developers Altera, Open Silicon and Xilinx to collectively accelerate industry efforts in bringing to market a broad set of technologies, the companies said. The consortium will initially define a specification to enable applications ranging from large-scale networking to industrial products and high-performance computing.
One of the primary challenges facing the industry is that the memory bandwidth required by high-performance computers and next-generation networking equipment has increased beyond what conventional memory architectures can provide. The term "memory wall" has been used to describe the problem. Breaking through the memory wall requires a new architecture that can provide increased density and bandwidth at significantly reduced power consumption.
HMC capabilities are a leap beyond current and near-term memory architectures in the areas of performance, packaging and design efficiencies, its founding members claimed.
HMC could lead to unprecedented levels of memory performance and facilitate new applications in networking, medical, energy, wireless communications, transportation, security and other markets. For example, the development of systems and technologies will enable a more efficient, reliable and secure smart grid infrastructure with integrated renewable energy resources.
The HMCC's memory specifications will be co-developed among the consortium members. The consortium is open to an unlimited number of adopters, with the opportunity to receive early access to draft specifications and participate in specification discussions and development.