Taiwan Semiconductor Manufacturing Company (TSMC) reportedly plans to team up with Micron Technology to develop 3D ICs that will integrate Micron's hybrid memory cube-based DRAM chips with TSMC's logic chips through TSV technology, according to industry sources.

　　A successful development of the chip stack technology between DRAM and logic chips will enable TSMC to extend this technology to integrate mobile application processors and DRAM chips, and therefore will help TSMC further expand its client base, said the sources.

　　To accelerate its development into the 3D IC segment, TSMC has also stepped up its high-end backend packaging/testing services, beginning to offer CoWoS (chip-on- wafer-on-substrate) packaging for 2.5D ICs.

　　For mobile telecom clients, TSMC also plans to begin to offer integrated fan-out wafer level packaging (InFO-WLP) process in 2015, the sources added.